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Mipsology’s Zebra looks like a winner

Mipsology is a 5-year-old company, based in France and California, with a differentiated product that solves a real problem for some customers. The company’s product, Zebra, is a deep learning compute engine for neural network inference. While these engines are not uncommon, Zebra unlocks a potentially important platform for inference using the field programmable gate array (FPGA). There are two parts to this story, which is one of the challenges Mipsology faces.

Inference — the phase where deep learning goes to work

Deep learning has two phases: training and inference. In training, the engine learns to do the task for which it is designed. In inference, the operational half of deep learning, the engine performs the task, such as identifying a picture or detecting a computer threat or fraudulent transaction. The training phase can be expensive, but once the engine is trained it performs the inference operation many times, so optimizing inference is critical for containing costs in using deep learning. Inference can be performed in the cloud, in data centers or at the edge. The edge, however, is where there is the greatest growth because the edge is where data is gathered, and the sooner that data can be analyzed and acted upon, the lower the cost in data transmission and storage.

Specialized AI chips are hot, but the mature FPGA is a player too

For both training and inference, specialized processors are emerging that reduce the cost of using deep learning. The most popular deep learning processor is the graphics processing unit (GPU), principally Nvidia’s GPUs. GPUs rose to prominence because Nvidia, seeing the computational potential of its video cards, created a software platform, CUDA, that made it easy for developers and data scientists to use the company’s GPUs in deep learning applications. The GPU is better suited to training than inference, but Nvidia has been enhancing its GPUs’ inference capabilities. Other specialized processors for deep learning inference include Google’s Tensor Processing Unit (TPU) and FPGAs.

FPGAs have been around since the 1980s. They are chips that can be programmed so the desired tasks are implemented in electronic logic, allowing very efficient repetitive execution, which is ideal for some deep learning inference tasks. Mipsology lists several advantages of FPGAs over GPUs for inference, including a lower cost of implementation, a lower cost of ownership and greater durability. While FPGAs have been used in some implementations, including on Microsoft’s Azure platform, these chips have not received the attention that GPUs have.    

Zebra is where inference meets FPGAs

Mipsology’s Zebra compute engine makes it easy for deep learning developers to use FPGAs for inference. Zebra is a software package that provides the interface between the deep learning application and the FPGA, so that specialized FPGA developers do not to have to be brought in to exploit the benefits of the processors. Zebra is analogous to nVidia’s CUDA software; it removes a barrier to implementation.

Bringing together the puzzle pieces

FPGAs are mature and powerful potential solutions that lower the cost of inference, a key to expanding the role of deep learning. However, the programming of FPGAs is often a barrier to their adoption. Zebra is an enabling technology that lowers that barrier. In the world of specialized solutions based on broadly applicable technologies such as deep learning, there are opportunities for products and services to make it easier to assemble the pieces and lower the cost of development. Zebra is exploiting one of these opportunities.

Intel: Optimizing its scale advantage for Business of One flexibility

TBR perspective

Usually sound business execution of world-class engineering, coupled with world-class monolithic manufacturing, has made Intel a dominant force around which technology businesses have orbited for decades. Intel’s dominance has been baked in the PC and server form factors, while ever smaller price points and form factors have shifted end-customer purchase criteria from computational performance specifications to business outcomes and user experiences.

Intel’s success has broadly expanded IT to address business problems and reshape our personal lives. Intel’s revenue growth prospects have diminished as its innovation has continued to increase the capacity and shrink the form factors and unit cost of its products. Intel delivers mature components that are embedded in mature products. Nevertheless, Intel thrives. The company has made mistakes, though, such as failing to address the mobile market. Intel’s capital- and engineering-intensive business requires it place large bets on its vision of the future. Now, facing waves of innovation in artificial intelligence (AI), Internet of Things (IoT) and processor design, Intel is, in effect, rearchitecting the company to reduce its dependence on the CPU, and thereby expand its market.

The key to Intel’s new architecture is companywide integration. Intel has always had more products and technologies, including video, networking, storage and memory silicon, than CPUs. As silicon becomes more diversified and is embedded in an increasing number of devices, Intel aims to create, along with customers, a far larger variety of solutions, often at a much smaller scale than the company’s monolithic products. To capitalize on the company’s enormous intellectual property, Intel must break down silos within the company. This will result in products that will often benefit from breaking down silos in silicon by facilitating the integration of computation, storage and communications.

The cultural challenge Intel will face will be in orchestrating and timing the various development teams such that the innovation cycles come together in world-class packages of tightly coupled compute, storage and networking form factors to power the smallest of edge compute instances and the largest of the high-performance computing (HPC) instances. The necessary work of rearchitecting the sales and marketing organizations remains for the next CEO, who has not yet been named, but the task is far less daunting than coordinating development and manufacture.

The thread that will stitch together these instances in the multicloud, always-on world of compute will be software. Software made interoperable through a “pruning,” as Intel Chief Engineering Officer and Technology, Systems Architecture & Client Group President Murthy Renduchintala described it, of the existing assets and frameworks into a cogent set of frameworks and tool sets to power innovation and optimize these scaled designs for specific workloads powered by AI is fed by voice and video as much as they have been fed by human interaction through keyboards in the past.

 

Intel Analyst Summit: Intel (Nasdaq: INTC) hosted an analyst event for the first time in four years to outline its technology road maps through 2021 and to articulate the business and cultural changes it believes are necessary for it to capitalize on the growing business opportunity Moore’s Law economics has unleashed. The senior leadership team gave about 50 analysts very detailed and frank briefings under a nondisclosure agreement (NDA), with ample time for follow-up conversations throughout the event.